MATLAB VIRTUAL CONFERENCE:Learn from MATLAB experts. At your computer.

Event Overview Connect with peers. Learn from MATLAB experts. At your computer.

Event Date: October 14, 2009
Time: 7:00 a.m.
Click here to Register

A three-dimentional wireframe plot of the unno...

Join MATLAB product experts and fellow users to see the latest features in the MATLAB product family, learn how to solve your current engineering challenges, and network with colleagues from around the globe—all without leaving your desk.
The MATLAB Virtual Conference will offer sessions for users with any level of MATLAB expertise. Attendees can select from four concurrent conference tracks:
  1. Do You Speak MATLAB? is for new or inexperienced MATLAB users
  2. So You Think You Know MATLAB? is for experienced users looking to learn more about the MATLAB product family
  3. How Far Can You Take MATLAB? is for anyone interested in seeing how to use MATLAB in innovative ways as part of the design and development process
  4. MATLAB Enabled Campus is for professors and researchers who want to learn more about integrating MATLAB across their institution
Watch a short video about the conference

Each live presentation will include 15 minutes for Q&A

if not able to register plz visit below link:
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[News] 60 Minutes Last Night Featured DARPA and DEKA's Bionic Arm

Funding, news coverage and business interest is happening for robotic research, start-ups and commercial apps

THE ROBOT REPORT has the largest online (free) directory of worldwide robotic businesses and research facilities and tracks the daily business of robotics on it's site.

SANTA BARBARA, CA (September 21, 2009) - Stories about the robotics world abound: everything from breakthroughs in medical and defense technologies (like last night's 60 Minutes show) to the ethical issues of robotic nanny care and resolving airspace management so that unmanned drones can work in our skies. Companies such as yours, as participants in the industry, need to keep abreast of these changes -- particularly in those areas of the industry that are doing well and/or emerging.

THE ROBOT REPORT is NOT a stock broker or financial institution. Rather, we are an independent research website with a dedicated and energetic investor and advocate. Most facets of the robotics industry are on the verge of major breakthroughs. For careers, investments, science and technology, this is an industry to watch closely with a business mindset. The founder of a leading robotics company said about THE ROBOT REPORT: “...your site has been a mainstay of my presentations. It shows next-generation robotics as ‘a real business and not just a big playground.’”

THE ROBOT REPORT also compiles a proprietary tracking device, Robo-Stox(TM), which graphically compares worldwide publicly traded robotics stocks to the NASDAQ index.

About The Robot Report
The Robot Report is a U.S. based research website focused on tracking the worldwide business of robotics and compiling and updating the most comprehensive database of public and private companies and research and educational facilities participating in the robotics industry.

There are over 100 news items and 1,100 robotic businesses and research links on the site. Bookmark and revisit often to keep current with this dynamic emerging industry.

Frank Tobe
805 895-4141

© 2009 The Robot Report. All rights reserved. ROBO-STOX™ is proprietary to The Robot Report.

Android Development for Embedded Devices - Live Webiners

Live webiners from sonics, synopsys, NXP, mentor graphics, EETimes

Mentor Graphics: Android Development for Embedded Devices

Click to watch

Presenter: Colin Walls, author of "Embedded Software The Works"
* Learn what the Android platform is and how it works
* Review tools and services that are available to help deploy Android
* Understand how Android facilitates the implem
entation of cellular communications.

Mentor Graphics
Reducing Physical Verification Cycle Times with Debug

Innovation Click to watch
This Physical Verification web seminar will address the complexity ofdebugging physical verification results and new, automated methods tosimplify the process.With the increased complexity in physical verification rules and theimprovements in runtimes with Calibre, the debugging of physicalverification results is becoming a bottleneck in the verificationcycle. Calibre continues to work to address the entire verificationcycle from run time through debug by enabling significant improvementsin the flow.To address the debug burden a series of new features have beendeveloped. These additions add automation to the debug flow,
allowingdesign teams to significantly reduce their physical verification cycleturn around times.

Achieve Higher Performance in Your Wireless System Designs

Click to watch
Wireless applications abound, NXP Semiconductors can help you achieveyour wireless system performance goals. NXP offers proven Low NoiseAmplifiers (LNAs), Local Oscillator (LO) generators and medium-powerMonolithic Microwave ICs (MMICs) that push the performance boundary.Attend this webinar to learn how NXP can help you achieve higherperformance for your next wireless application.
Times System-on-Chip Virtual Conference: Designing Next
September 16 8am PT - 3pm PT
11am ET - 6pm ET
Click to watch
EE Times, the leading resource for design decision makers in theelectronics industry, brings you the third webinar in its VirtualConference series titled - System-on-Chip: Designing Next GenerationSoCs.
This conference will be of interest to hardware and embedded softwaremanagement, including systems architects, system designers, embeddedsystem designers, and ASIC- and FPGA-based SoC developers and willexamine:
*The Economics of Chip Design
*Intellectual Property
*Analog/Digital Integration
Optimization Techniques for Peak SoC Performance
Thursday, September 1711am PT2pm ET
Click to watch

SoC complexity has increased in applications such as video processingfor HDTVs and smart phones. The ability to reactively modelapplication data and analyze the results are critical to IC and systemdesigners to ensure SoCs meets performance requirements with the mostefficient implementation. Hear Sonics, Inc. and JEDA Technologiesdiscuss specific techniques using intelligent traffic generation andperformance analysis tools to offer easy tuning and systemoptimization to deliver the highest SoC performance at the lowestpossible gate count.
Reduce Energy Consumption for Datapath Designs
Tuesday, September 22 9am PT - 12pm ET

Click to watch

In this webinar:
* Hear a brief overview on low power design requirements for long running circuits.
* Learn about an innovative approach to reduce the energy consumption of these circuits by selecting low power architectures, operand encoding and cell mappings based on power costing and switching activity considerations.
* Get introduced to the DesignWare minPower Components and the additional power savings you can achieve on top of your current low power design methodology.

EETimes EE Times Multicore Virtual Conference
Click to watch

The EE Times Multicore Virtual Conference addresses one of the biggestchallenges design engineers currently face, which is deciding when toadopt multicore processors in their designs and what the implicationsare for the software tools they will need to

Profiling C code on Microsoft Visual C++ - VC++

How to enable profiling option in visual studio – VC++

In general compiler has an option to profile C code on Visual C++ under Build option

i.e. build->profile

For this option to be enabled we need to follow below steps on windows.

  • Go to windows start on task bar.
  • Go to run.
  • Type ‘regedit’
  • Click on HK_CURRENT_USER in registry editor.
  • Go to softwares->Microscoft->DevStudio
  • In general depending up on the VC version you can see a folder with that version (If you are using VC6.0 you can see a folder with name 6.0)
  • Then click on folder ‘general’.
  • Do a right click and create new DWORD values with name ‘ProfilerInstalled’ and set its value as ‘1’

Xilinx Virtex-6® and Spartan-6® FPGAs - Webcast

Create faster, less expensive, and lower power memory interfaces with Xilinx Virtex-6® and Spartan-6® FPGAs

Webcast Date & Time:

Wednesday October 6, 2009
11:00 AM PDT / 2:00 PM EDT / 19:00 GMT

Register to Attend Live Webcast

With the development of next generation communications, networking, and consumer electronics products, the desire for higher memory performance and density continues to grow. At the same time, consumers and manufacturers are demanding solutions that offer lower initial costs as well as lower operating costs, preferably with less environmental impact. This means that while the memory performance and density requirements are going up, the memory cost and power requirements are headed in the opposite direction, making the system designer’s job increasingly difficult.

In this webinar, Xilinx will introduce the memory interface solutions for Virtex-6 and Spartan-6 devices and explain how to use these solutions to get the most out of your external memory in your next FPGA design.

Web seminar attendees will learn:
DRAM industry trends and roadmaps
How the Virtex-6 Memory Controller reaches new levels of performance and efficiency
How the Spartan-6 Memory Controller improves performance while lowering cost and power

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